Blinky and VHDL!!!
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Prelab
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Watch the Dr. J Show episode, "A Taste of VHDL", linked 
on the ECE 241 web page. You may also want to take a
peek at Chapter 4 of the text.

Lab Experiment
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Repeat lab 1, but using VHDL to model the inverter instead
of drawing a schematic. Demo on the board and get a signature
on your design summary.

Deliverables
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- VHDL source
- Signed Design Summary
- Brief report. In addition to the usual, comment on your first
  impressions of using an HDL: what was hard, what was easy, what
  is (still) confusing.

No simulation necessary!