ECE 241 - Getting to Know your Environment!

 

When starting a new engineering activity, never underestimate the value of "blazing a trail" using a simple example, e.g. the "blinking light" test. Such a test allows you to focus on the design flow, rather than the design, and will give you (and your manager!) the confidence that you are ready for more complex challenges.

 

Objective

Enter a schematic design using the Xilinx ISE tools to connect a button to an LED. Simulate, synthesize, download, and test.

Pre-Lab Exercise

Familiarize yourself with the Xilinx ISE tools by watching this episode of The Dr. J Show. You can also use other material under the Reference Material section of the 241 web page.

Experiment (10 pts)

Create a schematic that connects the pushbutton input pin to an inverter, which the drives the LED output pin. You will need to create a UCF file to assign the pins. Demonstrate a behavioral simulation and your circuit implementation to the TA. Turn in your signed Xilinx Design Summary. You will find the second and third episodes of the Dr. J Show, Creating a testbench waveform and behavioral simulation and Assigning pins, performing post-route simulation, and downloading, very helpful in completing the lab.

Report (5 pts)

The design for this lab was completely specified. Thus, turn in a one-page, professional report that describes your design process. Be explicit and complete, e.g., read lab instructions, read ISE tutorial, ran ISE software, etc. Briefly elaborate on any problems you encountered. Finally, attach to your report hardcopies of your schematic and behavioral simulation.

 

Specifics

  1. Be sure you have identified the FPGA by the correct family (Spartan3E), device (XC3S100E), and package (CP132); otherwise you won't be able to program the FPGA.
  2. You will need to set the FPGA start-up clock to "JTAG Clock." This is done under the "startup options tab" of the process properties dialog box for the "Generate Programming File" process. (right click and select "properties")