ECE 340/341 Microcontrollers and Lab (Fall 2013)
All assignments are collected at the start of class
on the specified due date. Each assignment should have your name, the course
number, the date, and the assignment designation (e.g., HW1, etc.). Attendance
is mandatory. Students who miss five or more class periods
will receive a final grade of F for the course. (Arriving late or leaving
early is considered absent.)
The primary goal of this course is to give you the fundamental skills needed
to understand, use, and design microcontroller-based systems. This includes
the following: (1) What is a microcontroller? (2) What can it do (and not
do)? (3) How does one design (and program) a microcontroller-based system?
Note: In addition to the listed prerequisites, ECE 340/341 required junior-level
standing in EE or CompE. (e.g., You must have passed Circuits II with a C
Programming 32-bit Microcontrollers in C, Lucio Di Jasio, 2008. ISBN:
Please complete the reading assignments in a timely manner so that you may
contribute in the class discussions.
Aug 26 - "Day 1" from text
Sep 2 - Day 2
Sep 20 - Day 3 and 4 (as needed)
Sep 25 - Day 5 of the text
Sep 27 - Read sections 8.1, 3, and 5 of the PIC32 Family RM and chapter 7
of the Peripheral Library Guide (skim!).
Oct 29 - Day 8 of the text (focus on I2C and EEPROM); EEPROM
sample code (zip).
Homework and Quizzes (20%)
There will be approximately 50 points worth of homework and quizzes, possibly
unannounced, throughout the semester. These will be used to ensure that students
are keeping up with the reading, the lectures, and the lab.
Sep 6. Data Fow Diagrams (DFD) and Control Flow Diagrams (CFD) for Lab 2
Sep 9. ReadCoreTimer() and rollover assignment.
Sep 13. DFD and CFDs for Lab 3 software.
Sep 23. DFD and CFDs for Lab 4 software.
Sep 27. (1) calculate the noise margins when driving an input pin of a
Spartan 6 FPGA from Port B of the PIC32, assuming a low-voltage TTL (LVTTL)
I/O standard. (2) Rather than pass the stepper motor code to his output_sm_code()
routine, Dr. J decides he wants to pass a mask indicating which winding
voltages need to change. Discuss what changes are needed to his sw_fsm()
routine and how this change affects his output routine. (3) After pondering
the FSM diagram from Figure 6 of the Lab3 handout, Dr. J realizes that the
value of his present state variable changes in a very regular manner,
depending upon the direction and mode. Can you think of a much
(much!) easier way of representing the next state logic than
a switch-case and nexted ifs? (Think back to ECE 240 - Digital Logic.) If
so, describe; if not, ...
Oct 1. DFD and CFD for Lab 5 software.
Oct 9. (1) Why do CMOS devices specify maximum rise/fall times for input
signals? (2) Why do they not specify minimum transition times?
Nov 1. Why does an I2C network rely on external pullups for generating the
logic high value on SDA and SCL? (Or, why must I2C devices use open-drain
ouptuts connecting to these lines?)
Nov 6. Three little (?) questions.
Nov 22. How would you determine if configuring a peripheral configures the
corresponding I/O pins?
Each exam is worth 100 points and will be closed book, open
notes. Semester exams are 50 minutes long; the final exam will be
two hours long and comprehensive. Please bring paper, calculator, pencil(s)
and eraser to the exam.
Dec 17, 10am-Noon, Final Exam
Grades (and other information) will be distributed electronically to student
UI e-mail addresses periodically throughout the semester. Grades will be
calculated using the traditional scale (90%=A, 80%=B, etc.).