Current Research

Jet Propulsion Laboratory (JPL): Development of Power Circuits for Systems on A Chip (SOAC) and Avionic Applications

Principal Investigator: Harry W. Li

Research Associate: Ronald O. Nelson

Research Assistants:
Kevin Buck, Dong Pan, Seenivasan Subramaniam,

Duration: 1/20/00 to 12/31/01

The goal of this project will be the development of power management circuits in SOI technology for both low and high voltage applications, with the intent of supporting JPL's systems-on-a-chip (SOAC) program development. Honeywell's 0.8 um and 0.35 um partially-depleted process will be used as the target process.

Current Research