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Research Projects >> Reconfigurable Computing >> Current Research Project >>
Low Power, Reconfigurable Computing Platform
The Reconfigurable Computing Platform is a computing platform for spacecraft, designed to maximize throughput while minimizing size and power consumption. It is based on the Field Programmable Processor Array (FPPA) developed by the same team: a radiation hard, low power, high throughput, reconfigurable parallel processor network on a single chip. The Reconfigurable Computing Platform augments FPPA chips with reconfigurable memory and reconfigurable system-level interconnect to make a complete computing subsystem. This multidisciplinary project is an example of hardware-software co-design, bringing together architecture and digital chip design experts in Electrical and Computer Engineering with Software specialists from Computer Science to implement a novel computing subsystem optimized for spacecraft on-board computing.
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